Timers
The timer system on the hcs12 is comprised of two main timing units: (1) The Enhanced Capture Timer (ECT) module and (2) the Clock and Reset Generator (CRG) module. Most of the timing functions we will use are part of the ECT module. However, the CRG module is also important as it contains the Phase Lock Loop (PLL) that drives the core clock of system, and the Real Time Interrupt (RTI) that is widely used for various timing functions. These modules are fully described in the Motorola documentation, with the ECT module documentation located here (S12ECT_16B8CV1.pdf) and the CRG module documentation located her (S12CRGV2.pdf). These documents are essential for working with the timing units.
At the heart of the ECT is a 16 bit free running counter called the TCNT. It is a hardware register that constantly counts all the clock pulses starting from $0000 at reset/power-on. When it reaches its 16 bit limit $FFFF (65,536 pulses), it rolls over (or overflows) to $0000 and keeps counting more. When it does overflow, it can generate an interrupt called the Timer Overflow Interrupt. Since the overflow occurs at periodic intervals, we can use the Timer Overflow Interrupt as a timer. The period that the timer counts depends on the value you write in the TSCR2 register at address $4D.
The TCNT counter is a 16 bit register and is located at addresses $44 and $45 ($44 has the high byte of data and $45 the low byte). You can easily test the counter in DBug12 by first enabling the timer, and then reading the TCNT register. The DBug 12 code to do this would be:
>mm 46 08 ; enable timer - this starts the timer running
>md 44 ; this will display the contents of the TCNT register
Enter the last line several times - you will see that the contents of the TCNT register changes as the timer counter is updated. Note that in the above DBug12 code, the ECT timer is running at its default rate, which is 24 MHz (PR2 = PR1 =PR0 bits all set to 0, prescale factor = 1). If we set the TSCR2 register bits to PR2 = 0, PR1 = 1 and PR0 = 1, then the prescale factor would be 8, and the timer counter would run at 24MHz/(8) = 3 MHz. See the hardware manual for complete details.
Also note that there are 8 timer channels that can be configured as input capture timers or output capture timers. The input capture timer is used to measure the time between . These are more accurate than using the timer overflow interrupt and offer more functionality, but they are not necessary when we use simple timing as we do in our labs.
The Real Time Interrupt is also a type of timing interrupt. It is simpler than many of the timing systems in the ECT, but it also has limited functionality. It is commonly used for basic periodic tasks, such as setting a data sampling rate. We use it in the timer demo to continually flash an LED.
Clocks
Timers are always timed relative to some type of hardware clock, and there are several clocks in the hcs12 system (see below). The clock frequency for a given clock is the base rate that a timer operates from. Usually the base rate is modified by a "prescaler" value that is set in a timer register. The prescaler divides the clock frequency (or multiples the clock period) by some integer value, so that the actual count rate of a timer can be set slower than that of the base clock rate. The full details of the clock/count rates are in the CRG and ECT manuals noted above.
* For the TCNT, the E-clock or bus clock controls the timing. The bus clock runs off a PLL in the Dragon12 and is set to a rate of 24 MHz (p. 31 of the CRG manual). Thus, the base TCNT period is about 40 ns per count, and this is further modified by the prescaler value set in the TSCR2 register as noted above.
* The Real Time Interrupt generates interrupts at a rate determined by the OSCCLK (Fig. 4.6, p. 38 CRG manual), which is set to 4 MHz by the crystal on the Dragon12 board (you can see the crystal near the hcs12 chip). The Real Time Interrupt rate is further controlled by the prescaler values in the RTICTL register (p. 25 of the CRG manual). For instance, if we set the prescaler value in the RTICTL register to be $7F = %01111111, the prescaler value is 16 x 2^16. At 4 MHz, the clock period is 250 ns, so the RTI interrupt rate is 250 ns x 16 x 2^16 ~ 262 msec (ie, every 262 msec we get an RTI interrupt).
The short-term accuracy of the timing units is on the order of a microsecond or less, and very accurate timing waveforms can be generated (like you might use in controlling the spark system in an internal combustion engine). However, the accuracy over long times is limited by the stability of the crystal, etc. For long-term timing, like days, weeks and months, you need to use an external timing source, such as an external real-time clock module, or the 60 Hz grid system.
Timer Overview