Overview of the HCS12 Analog-Digital Converter

 

 

The A/D (analog-digital) converter is well described in Prof. Almy's book (p.206-215) that we use in this course. On the Dragon12 board, the trimpot VR2 is an orange-colored pot located on the upper-right side of the board. The trimpot basically gives 0-5 V signal to pin AN07/PAD07 (pin 7 of the A/D converter). If you read the data off the AN7 pin, you are reading the analog voltage out of the VR2 trimpot. The analog voltage is converted to a digital form by the A/D converter, and is scaled for 8 or 10 bits full scale. We usually represent the digital data in hex form, but you could always convert it to decimal if needed.

 

 

    * >mm 82 80 ; set ADPU power up (turn A/D on) in ATDCTL2 at address $0082

 

    * >mm 83 08 ; set 1 conversion/sequence in ATDCTL3

 

   * >mm 84 6b ; set ATDCTL4 to 10 bit, 18 A/D clock periods per conversion, 1 MHz conversion clock freq. (24 MHz/24 see below))

 

    * >mm 85 27 ; set ATDCTL5 to left justify, unsigned, sample only specified channel, scan = continuous conversions, sample Chan 7 (ie, sample pin AN7)

 

    * > md 90 ; this will show the actual data in the ATDDR0 data register corresponding to the voltage out of the VR2. Note that we are looking at left-justified 10 bit data stored in 16 bits (2 bytes) of memory, so we only look at the leftmost 10 bits of the two bytes at address $0090 and $0091. The data are scaled to Vh (nominally 5V) and Vl (nominally 0 V) on the board. Also note that the "x" suffix in register designator ATDDRx refers to the conversion sequence, not the actual A/D input channel. Thus, for a single conversion, only channel ATDDR0 is used to store the results.

 

    * As an example, if we read a value of 5F00 using ">md 90" ($0090 = $5F, $0091 = $00), we have a bit pattern of %0101 1111 0000 0000. Our 10 bits of interest are the leftmost 10 bits, %0101 1111 00, which we can also interpret as % 01 0111 1100 = $17C. Our voltage value is then $17C/$400 x 5V = 380/1024 x 5V = 1.86 V nominal. If Vh/Vl are different than 5/0 V, we must scale our result accordingly. In one test of a Dragon12 board, the values were measured with a DMM to be Vh = 4.88 V and Vl = 0.00 V.

 

Notes

 

    * The ATD (A/D) conversion clock frequency is equal to the system clock (24 MHz for the Dragon12) divided by the prescaler value in register ATDCTL4. If you write "01011" to bits PRS4 - PRS0, you set the conversion clock frequency to 24 MHz/24 = 1 MHz. The maximum ATD conversion clock frequency is 2 MHz. The minimum is 500KHz.

 

    * The A/D total conversion time is: initial sample time + final sample time + conversion time. The initial sample time is always 2 ATD clock cycles. The final sample time is the "Sample Time Select" value set in register ATDCTL4 (16 in the above example) times the ATD clock period . The conversion time is the bit resolution (10 bits above) times the ATD clock period. For a 1 MHz ATD clock above, the ATD clock period is 1 microsecond (1 usec). The total A/D conversion time is then:

 

      2*1 usec + 16*1 usec + 10*1 usec = 28 usec

 

      The sample rate is the inverse of this or 35,714 HZ. The maximum sample period for 10 bit samples is 7 usec, giving a maximum 10-bit sample rate of about 143 kHz.

 

The ADC converter is further explored in the context of C programming in the C and the ADC Demo Program.